Prof. Kim`s R.P.

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  • 10 J. Jang, C. Choi, J.-S. Lee, K.-S. Min, J.-G. Lee, D. M. Kim, and D. H. Kim "Design of gate stacks for improved program/erase speed, retention and process margin aiming next generation metal nanocrystal memories" Semicond. Sci. Technol., vol. 24 , pp. 115009, 2009-10 PDF
  • 9 J. Lee, C. Choi, S. Park, I.-Y. Chung, C.-J. Kim, B.-G. Park, D. M. Kim, and D. H. Kim "Ultra-energy-efficient analog-to-digital converters based on single-electron transistor/CMOS hybrid technology for biomedical applications" Semicond. Sci. Technol., vol. 24 , pp. 115007, 2009-10 PDF
  • 8 J.-H. Park, S. Lee, K. Jeon, S. Kim, S. Kim, J. Park, I. Song, C. J. Kim, Y. Park, D. M. Kim, and D. H. Kim "Density of States-Based DC I-V Model of Amorphous Gallium-Indium-Zinc-Oxide Thin-Film Transistors" IEEE Electron Device Letters., vol. 30, no. 10, pp. 1069-1071, 2009-10 PDF
  • 7 S. Lee, K. Jeon, J.-H. Park, S. Kim, D. Kong, D. M. Kim, D. H. Kim, S. Kim, S. Kim, J. Hur, J. C. Park, I. Song, C. J. Kim, Y. Park, and U.-I. Jung "Electrical stress-induced instability of amorphous indium-gallium-zinc oxide thin-film transistors under bipolar ac stress" Appl. Phys. Lett., vol. 95, pp. 132101-1-132101-3, 2009-09 PDF
  • 6 K.-S. Roh, S. Park, D. H. Kim, and D. M. Kim "Lateral Trapped-Charge Profiling Based on the Extraction of the Flat Band Voltage by using the Optical Substrate Current in Nitride-Based Charge-Trap Flash Memories" IEEE Transactions on Electron Devices, vol. 56, no. 9, pp. 2034-2044, 2009-09 PDF
  • 5 C. Choi, J. Lee, S. Park, I.-Y. Chung, C.-J. Kim, B.-G. Park, D. M. Kim,and D. H. Kim "Comparative study on the energy efficiency of logic gates based onsingle-electron transistor technology" Semicond. Sci. Technol., vol. 24, no. 6, pp. 065007, 2009-05 PDF
  • 4 D. S. Lee, S. Kang, K.-C. Kang, J.-E. Lee, J. H. Lee, K.-J. Song, D. M. Kim, J. D. Lee and B.-G. Park "Fabrication and Characteristics of Self-Aligned Dual-Gate Single-Electron Transistors" IEEE Trans. Nanotechnology, vol. 8, no. 4, pp. 492-497, 2009-07 PDF
  • 3 S. R. Park, K. Y. Kim, C. Choi, K.-J. Song, J.-H. Park, K. Jeon, S. Lee, T. Y. Kim, J. E. Lee, S, Lee, S. Park, J. Jang, D. M. Kim and D. H. Kim "Comparative Study on Program/Erase Efficiency and Retention Properties of 3-D SONOS Flash Memory Cell Array Transistors : Structural Approach from Double-Gate FET and FinFET to Gate-All-Around FET" Journal of Korean Physical Society, vol. 54, no. 5, pp. 1854-1861, 2009-05 PDF
  • 2 K. Jeon, S. Lee, J.-H. Park ,C. Choi, K.-J. Song, S. R. Park, T. Y. Kim, J. E. Lee, S. Park, S. Lee, J. Jang, D. H. Kim, and D. M. Kim "Optical Charge Pumping Method for Extracting the Energy Level of Interface States in Program/Erase Cycled SONOS Flash Memory Cell and Its Program Time Dependence" Journal of Korean Physical Society, vol. 54, no 5, pp. 1862-1867, 2009-05 PDF
  • 1 K. S. Roh, S. Park, K.-J. Song, J.-H. Park, S. Lee, C. Choi, K. Jeon, S. R. Park, T. Y. Kim, J. E. Lee, S. Lee, J. Jang, D. H. Kim, and D. M. Kim "Lateral Trapped Charge Profiling Based on the Extraction of Flat Band Voltage by using the Optical Substrate Current in Charge Trapping Flash Memory Cells" Journal of Korean Physical Society, vol. 54, no. 5, pp. 1848-1853, 2009-05 PDF
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