Prof. Kim`s R.P.

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  • 17 S. Choi, H. Kim, C. Jo, H.-S. Kim, S.-J. Choi, D. M. Kim, J. Park, D. H. Kim "The Effect of Gate and Drain Fields on the Competition Between Donor-Like State Creation and Local Electron Trapping in In–Ga–Zn–O Thin Film Transistors Under Current Stress" IEEE Electron Device Letters, vol. 36, no. 12, pp. 1336-1339, 2015-12
  • 16 B. Choi, D. Lee, J.-H. Ahn, J. Yoon, J. Lee, M. Jeon, D. M. Kim, D. H. Kim , I. Park, Y.-K. Choi, and S.-J Choi "Investigation of optimal hydrogen sensing performance in semiconducting carbon nanotube network transistors with palladium electrodes" Applied Physics Letters, vol. 107, p. 193108, 2015-11
  • 15 J. Kim, S. Choi, J. Jang, J. T. Jang, J. Kim, S.-J. Choi, D. M. Kim, and D. H. Kim "Analysis of Instability Mechanism under Simultaneous Positive Gate and Drain Bias Stress in Self-Aligned Top- Gate Amorphous Indium-Zinc-Oxide Thin-Film Transistors" JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 15, no. 5, pp. 526-532, 2015-10
  • 14 H. Kang, J. T. Jang, J. Kim, S.-J. Choi, D. M. Kim, and D. H. Kim "Comparative Analysis on Positive Bias Stress-Induced Instability under High VGS/Low VDS and Low VGS/High VDS in Amorphous InGaZnO Thin-Film Transistors" JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 15, no. 5, pp.519-525, 2015-10
  • 13 Sungju Choi, Youngjin Kang, Jonghwa Kim, Jungmok Kim, Sung-Jin Choi, Dong Myong Kim, Ho-Young Cha, Hyungtak Kim, and Dae Hwan Kim "Frequency-dependent C-V Characteristic-based Extraction of Interface Trap Density in Normally-off Gate-recessed AlGaN/GaN Heterojunction Field-effect Transistors" JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 15, no. 5, pp.497-503, 2015-10
  • 12 Jungmin Lee, Sungju Choi, Seong Kwang Kim, Sung-Jin Choi, Dae Hwan Kim, Jisun Park, and Dong Myong Kim "Modeling and Characterization of the Abnormal Hump in n-Channel Amorphous-InGaZnO Thin-Film Transistors After High Positive Bias Stress" IEEE Electron Device Letters, vol. 36, no. 10, pp.1047-1049, 2015-10
  • 11 B. Choi, J.-H. Ahn, J. Lee, J. Yoon, J. Lee, M. Jeon, D. M. Kim, D. H. Kim, I. Park, S.-J. Choi "A bottom-gate silicon nanowire field-effect transistor with functionalized palladium nanoparticles for hydrogen gas sensors" Solid-State Electronics, vol. 104 pp. 76-19, 2015-08
  • 10 H. Choi, J. Lee, H. Bae, S.-J. Choi, D. H. Kim, D. M. Kim "Bias-Dependent Effective Channel Length for Extraction of Subgap DOS by Capacitance–Voltage Characteristics in Amorphous Semiconductor TFTs" IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 62. no. 8, pp. 2689-2694, 2015-08
  • 9 J. T. Jang, J. Park, B. D. Ahn, D. M. Kim, S.-J. Choi, H.-S. Kim, D. H. Kim "Study on the Photoresponse of Amorphous In−Ga−Zn−O and Zinc Oxynitride Semiconductor Devices by the Extraction of Sub-Gap- State Distribution and Device Simulation" ACS Appl. Mater. Interfaces, vol. 28. no. 7, pp. 15570-15577, 2015-06
  • 8 J. Lee,J. Jang, B. Choi, J. Yoon, J.-Y. Kim, Y.-K. Choi, D. M. Kim, D. H. Kim, S.-J. Choi "A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor" Scientific Reports, Scientific Reports 5, 2015-07
  • 7 S. Choi, H. Kim, C. Jo, H.-S. Kim, S.-J. Choi, D. M. Kim, D. H. Kim "A Study on the Degradation of In–Ga–Zn–O Thin-Film Transistors Under Current Stress by Local Variations in Density of States and Trapped Charge Distribution" IEEE ELECTRON DEVICE LETTERS, vol. 36. no. 7, pp. 690-692, 2015-06
  • 6 K. M. Lee, J. Jang, S.-J. Choi, D. M. Kim,K. R. Kim,D. H. Kim "Extraction of Propagation Delay-Correlated Mobility and Its Verification for Amorphous InGaZnO Thin-Film Transistor-Based Inverters" IEEE Transactions on Electron Devices , vol. 62. no. 5, pp. 1504-1510, 2015-05
  • 5 J. T. Jang, J. Park, B. D. Ahn, D. M. Kim, S.-J. Choi, H.-S. Kim, D. H. Kim "Effect of direct current sputtering power on the behavior of amorphous indium-galliumzinc- oxide thin-film transistors under negative bias illumination stress" Applied Physics Letters, vol. 106, p. 123505, 2015-04
  • 4 J. S. Hwang, H. Bae, J. Lee, S.-J. Choi, D. H. Kim, D. M. Kim "Sub-Bandgap Photonic Capacitance-Voltage Method for Characterization of the Interface Traps in Low Temperature Poly-Silicon Thin-Film Transistors" IEEE Electron Device Letters, vol. 36, no. 4, pp.339-341, 2015-04
  • 3 J. Lee, H. Bae, J. S. Hwang, J. Ahn, J. T. Jang, J. Yoon, S.-J. Choi, D. H. Kim, D. M. Kim "Modeling and Separate Extraction Technique for Gate Bias-Dependent Parasitic Resistances and Overlap Length in MOSFETs" IEEE Transactions on Electron Devices, vol. 62, no. 3, pp. 1063-1067, 2015-03
  • 2 B. Choi, J. Lee, J. Yoon, J.-H. Ahn, T. J. Park, D. M. Kim, D. H. Kim, S.-J. Choi "TCAD-Based Simulation Method for the Electrolyte–Insulator–Semiconductor Field-Effect Transistor" IEEE Transactions on Electron Devices, vol. 62, no. 3, pp. 1072-1075, 2015-03
  • 1 S. Jun, H. Bae, H. Kim, J. Lee, S.-J. Choi, D. H. Kim,D. M. Kim "Dual-Sweep Combinational Transconductance Technique for Separate Extraction of Parasitic Resistances in Amorphous Thin-Film Transistors" IEEE Electron Device Letters, vol. 36, no. 2, pp. 144-146, 2015-
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