Prof. Kim`s R.P.

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  • 14 J. S. Shin, H. Bae, E. Hong, J. Jang, D. Yun, J. Lee, D. H. Kim, and D. M. Kim "Modeling and extraction technique for parasitic resistances in MOSFETs Combining DC I-V and low frequency C-V measurement" Solid-State Electron, vol. 72. pp. 78-81, 2012-06
  • 13 D. H. Kim , S. Park, Y. J. Seo, T. G. Kim , D. M. Kim, and I. H. Cho "Comparative investigation of endurance and bias temperature instability characteristics in metal-Al 2 O 3 -nitride-oxide-semiconductor (MANOS) and semiconductor-oxide-nitride-oxide-semiconductor (SONO" Journal of Semiconductor Technology and Science, vol. 12, no. 4, pp.449-457, 2012-12
  • 12 S. C. Baek, H. Bae, D. H. Kim, and D. M. Kim "Avalanche Hot Source Method for Separated Extraction of Parasitic Source and Drain Resistance in Single Metal-Oxide-Semiconductor Field Effect Transistors" Journal of Semiconductor Technology and Science, vol. 12, no. 1, pp. 46-52, 2012-03
  • 11 J. Lee, J.-M. Lee, J. H. Lee, W. H. Lee, M. Uhum, B.-G. Park, D. M. Kim, Y.-J. Jeong, and D. H. Kim "Complementary Silicon Nanowire Hydrogen Ion Sensor With High Sensitivity and Voltage Output" IEEE Electron Device Letters, vol. 33, no. 12, pp. 1768-1770, 2012-12
  • 10 Y. Kim, S. Kim, W. Kim, M. Bae, H. K. Jeong, D. Kong, S. Choi, D. M. Kim and D. H. Kim "Amorphous InGaZnO Thin-Film Transistors-Part II Modeling and Simulation of Negative Bias Illumination Stress-Induced Instability" IEEE Transactions on Electron Devices, vol. 59, no. 10, pp. 2699-2706, 2012-10
  • 9 Y. Kim, M. Bae, W. Kim, D. Kong, H. K. Jeong, H. Kim, S. Choi, D. M. Kim and D. H. Kim "Amorphous InGaZnO Thin-Film Transistors-Part I: Complete Extraction of Density of States Over the Full Subband-Gap Energy Range" IEEE Transactions on Electron Devices, vol. 59, no. 10, pp. 2689-2698, 2012-10
  • 8 E. Hong, D. Yun, H. Bae, H. Choi, W. H. Lee, M. Uhm, H. Seo, J. Lee, J. Jang, D. H. Kim, and D. M. Kim "Subbandgap Optical Differential Body-Factor Technique and Characterization of Interface States in SOI MOSFETs" IEEE Electron Device Letters, vol. 33, no. 7, pp. 922-924, 2012-07
  • 7 H. Bae, S. Jun, C. Jo, H. Choi, J. Lee, Y. H. Kim, S. Hwang, H. K. Jeong, I. Hur, W. Kim, D. Yun, E. Hong, H. Seo, D. H. Kim, and D. M. Kim "Modified Conductance Method for Extraction of Subgap Density-of-States in a-IGZO Thin-Film Transistors" IEEE Electron Device Letters, vol. 33, no. 8, pp.. 1138-1140, 2012-08
  • 6 H. Bae, I. Hur, J. S. Shin, D. Yun, E. Hong, K.-D. Jung, M.-S. Park, S. Choi, W. H. Lee, M. Uhm, D. H. Kim, and D. M. Kim "Hybrid C-V and I-V Technique for Separate Extraction of Structure- and Bias-Dependent Parasitic Resistances in a-InGaZnO TFTs" IEEE Electron Device Letters, vol. 33, no 4, 2012-04
  • 5 J. Jang, J. Kim, M. Bae, J. Lee, D. M. Kim, and D. H. Kim "Extraction of the sub-bandgap density-of-states in polymer thin-film transistor with the multi-frequency capacitance-voltage spectroscopy" Appl. Phys. Letters, vol. 100, issue. 13, p. 133506, 2012-03
  • 4 M. Bae, D. Yun, Y. Kim, D. Kong, H. K. Jeong, W. Kim, J. Kim, I. Hur, D. H. Kim, and D. M. Kim "Differential Ideality Factor Technique for Extraction of Subgap Density of States in Amorphous InGaZnO Thin-Film Transistors" IEEE Electron Device Letters, vol.33, no. 3, pp. 339-401, 2012-03
  • 3 J. S. Shin H. Choi, H. Bae, J. Jang, D. Yun, E. Hong, D. H. Kim, and D. M. Kim "Vertical Gate Si/SiGe Double HBT-based Capacitorless 1T DRAM Cell for Extended Retention time at Low Latch Voltage" IEEE Electron Device Letters, vol.33, no. 2, pp. 134-136, 2012-02
  • 2 S. Kim, Y. W. Jeon, Y. Kim, D. Kong, H. K. Jung, M. Bae, J.-H. Lee, B. D. Ahn, S. Y. Park, J.-H. Park, J. Park, H.-I. Kwon, D. M. Kim, and D. H. Kim "Impact of Oxygen Flow Rate on the Instability under Positive Bias-Stresses in DC Sputtered Amorphous InGaZnO Thin-Film Transistors" IEEE Electron Device Letters, vol. 33, no. 1,pp. 62-64, 2012-01
  • 1 D. H. Kim, Y. W. Jeon, S. Kim, Y. Kim, Y. S. Yu, D. M. Kim, and H.-I. Kwon "Physical Parameter-Based SPICE Models for InGaZnO Thin Film Transistors Applicable to Process Optimization and Robust Circuit Design" IEEE Electron Device Letters, vol. 33, no. 1, pp. 59-61, 2012-01
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