Journal papers

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  • 63 S.‐J. Choi, D.‐I. Moon, S. Kim, J. P. Duarte, and Y.‐K. Choi "Sensitivity of Threshold Voltage to Nanowire Width Variation in Junctionless Transistors" IEEE Electron Device Letters, vol. 32 no. 2 pp. 2010–2012, 2011-02
  • 62 K. R. Kim, D. H. Kim, S.-K. Sung, J. D. Lee, and B.-G. Park "Negative-Differential Transconductance Characteristics at Room Temperature in 30-nm Square-Channel SOI nMOSFETs With a Degenerately Doped Body" IEEE Electron Device Letters, vol. 23, no. 10, pp. 612-614, 2002-10
  • 61 S.‐J. Choi, C.‐J. Choi, J.‐Y. Kim, M. Jang, and Y.‐K. Choi "Analysis of Transconductance (gm) in Schottky‐ Barrier MOSFETs" IEEE Transactions on Electron Devices, vol. 58 no. 2 pp. 427–432, 2011-02
  • 60 C.‐J. Kim, S.‐J. Choi, S. Kim, J.‐W. Han, H. Kim, S. Yoo, and Y.‐K. Choi "Photoinduced Memory with Hybrid Integration of an Organic Fullerene Derivative and an Inorganic Nanogap‐Embedded Field‐Effect Transistor for Low‐Voltage Operation" Advanced Materials, vol. 23 no. 29 pp. 3326–3331, 2011-01
  • 59 D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, and B.-G. Park "Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire" J. Vac. Sci. Technol. B., vol. 20, issues 4, pp. 1410-1418, 2002-07
  • 58 B. H. Choi, S. H. Son, K. H. Cho, S.W. Hwang, D. Ahn, D. H. Kim, J. D. Lee, B. G. Park "Direct observation of excited states in double quantum dot silicon single electron transistor" Microelectronic Engineering, vol. 63, issues 1-3, pp. 129-133, 2002-07
  • 57 S. Kim, S.‐J. Choi, and Y.‐K. Choi "Interface‐Trap Analysis by an Optically Assisted Charge‐Pumping Technique in a Floating‐Body Device" IEEE Electron Device Letters, vol. 32 no. 1 pp. 84–86, 2011-01
  • 56 J.‐M. Choi, J.‐W. Han, S.‐J. Choi, and Y.‐K. Choi "Analytical Modeling of a Nanogap‐Embedded FET for Application as a Biosensor" IEEE Transactions on Electron Devices, vol. 57 no. 12 pp. 3477–3484, 2010-12
  • 55 K.-H. Chung, S.-K. Sung, D. H. Kim, W. Y. Choi, C. A. Lee, J. D. Lee and B.-G. Park "Nanoscale Multi-Line Patterning Using Sidewall Structure" Jpn. J. Appl. Phys., vol. 41, pp. 4410-4414, part 1, no. 6b, 2002-06
  • 54 S. Kim, S.‐J. Choi, and Y. Choi "Optically Assisted Charge Pumping on Floating‐Body FETs" IEEE Electron Device Letters, vol. 31 no. 12 pp. 1365–1367, 2010-12
  • 53 B. H. Choi, Y. S. Yu, D. H. Kim, S. H. Son, K. H. Cho, S. W. Hwang, D. Ahn, and B. G. Park "Double-dot-like charge transport through a small size silicon single electron transistor" Physica E, vol. 13, pp. 946-949, 2002-03
  • 52 D. H. Kim, K. R. Kim, S. K. Sung, J. D. Lee, and B.-G. Park "Dynamic exclusive-OR gate based on gate-induced Si island single electron transistor" IEE Electronics Letters, vol. 38, no. 11, pp. 527~529, 2002-05
  • 51 S.‐J. Choi, J.‐W. Han, S. Kim, D.‐I. Moon, M. Jang, and Y.‐K. Choi "Dopant‐Segregated Schottky Source/Drain FinFET with a NiSi FUSI Gate and Reduced Leakage Current" IEEE Transactions on Electron Devices, vol. 57 no. 11 pp. 2902–2906, 2010-11
  • 50 J.‐H. Ahn, S.‐J. Choi, J.‐W. Han, T. J. Park, S. Y. Lee, and Y.‐K. Choi "Double‐Gate Nanowire Field Effect Transistor for a Biosensor" Nano letters, vol. 10 no. 8 pp. 2934–2938, 2010-10
  • 49 S.-K. Sung, D. H. Kim, J.-S. Sim, K. R. Kim, Y. K. Lee, J. D. Lee, S. D. Chae, B. M. Kim, and B.-G. Park "Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology" Jpn. J. Appl. Phys., vol. 41, part 1, no. 4b, pp. 2606-2610, 2002-04
  • 48 D.‐I. Moon, S.‐J. Choi, J.‐W. Han, S. Kim, and Y.‐K. Choi "Fin‐Width Dependence of BJT‐Based 1T‐DRAM Implemented on FinFET" IEEE Electron Device Letters, vol. 31 no. 9 pp. 909–911, 2010-09
  • 47 K. R. Kim, D. H. Kim, S.-K. Sung, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn "Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire" Jpn. J. Appl. Phys., vol. 41, part 1, no. 4b, pp. 2574-2577, 2002-04
  • 46 S.‐J. Choi, J.‐W. Han, D.‐I. Moon, S. Kim, M. Jang, and Y.‐K. Choi "P‐Channel Nonvolatile Flash Memory With a Dopant‐Segregated Schottky‐Barrier Source/Drain" IEEE Transactions on Electron Devices, vol. 57 no. 8 pp. 1737–1742, 2010-08
  • 45 D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, D. Ahn "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic" IEEE Transactions on Electron Devices, vol. 49, no. 4, pp. 627-635, 2002-04
  • 44 D.‐I. Moon, S.‐J. Choi, J.‐W. Han, and Y.‐K. Choi "An Optically Assisted Program Method for Capacitorless 1T‐DRAM" IEEE Electron Device Letters, vol. 57 no. 7 pp. 1714–1718, 2010-07