344L. Lee, J. W. Hwang, J. W. Jung, J. C. Kim, H. I. Lee, S. W.Heo, M. H. Yoon, S. Choi, N. V. Long, J. S. Park, J. W. Jeong, J. Kim, K. R. Kim, D. H.Kim, S. I. Im, B. H. Lee, K. J. Cho, M. M. Sung*"ZnO Composite nanolayer with mobility edge quantization for multi-value logic transistors"Nature communications, vol. 10, no. 1998, pp. 1-9, DOI : 10.1038/s41467-019-09998-x , 2019-03
343Y.-T. Seo, M.-S. Lee, C.-H. Kim, S. Y. Woo, J.-H. Bae, B.-G. Park, and J.-H. Lee"Si-based FET-type synaptic device with short-term and long-term plasticity using high-k gate stack"IEEE Transactions on Electron Devices, vol. 66, no. 2, pp. 917-923, doi: 10.1109/TED.2018.2888871, 2019-02
342S. Choi, J.-Y Kim, J. Rhee, H. Kang, S. Park, D. M. Kim, S.-J Choi, D. H. Kim*"Method to extract interface and bulk trap separately over the full sub-gap range in amorphous InGaZnO thin-film transistors by using various channel thicknesses"IEEE Electron Device Letters, vol. 40, no. 4, pp. 574-577, DOI 10.1109/LED.2019.2898217, 2019-04
341K. Lee†, J.-H. Bae†, S. Kim, J.-H. Lee, B.-G. Park, and D. Kwon, (†These authors equally contributed to this work)"Ferroelectric-Gate Field-Effect Transistor Memory with Recessed Channel"IEEE Electron Device Letters, vol. 41, no. 8, pp. 1201-1204, doi: 10.1109/LED.2020.3001129, 2020-08
340M.-K. Park, H.-N. Yoo, Y.-T. Seo, S. Y. Woo, J.-H. Bae, B.-G. Park, and J.-H. Lee"Field Effect Transistor-Type Devices Using High-κ Gate Insulator Stacks for Neuromorphic Applications"ACS Applied Electronic Materials, vol. 2, no. 2, pp. 323-328, doi: 10.1021/acsaelm.9b00698, 2019-12
339S.-T. Lee, S. Lim, N. Choi, J.-H. Bae, D. Kwon, H.-S. Kim, B.-G. Park, and J.-H. Lee"Effect of Word-Line Bias on Linearity of Multi-Level Conductance Steps for Multi-Layer Neural Networks Based on NAND Flash Cells"Journal of Nanoscience and Nanotechnology, vol. 20, no. 7, pp. 4138-4142, doi: 10.1166/jnn.2020.17791, 2020-07
338D. Kwon, S. Lim, J.-H. Bae, S.-T. Lee, H. Kim, C.-H. Kim, B.-G. Park, and J.-H. Lee"Adaptive Weight Quantization Method for Nonlinear Synaptic Devices"IEEE Transactions on Electron Devices, vol. 66, no. 1, pp.395-401, doi: 10.1109/TED.2018.2879821, 2019-01
337Y.-T. Seo, M.-K. Park, J.-H. Bae, B.-G. Park, and J.-H. Lee"Implementation of Synaptic Device Using Various High-k Gate Dielectric Stacks"Journal of Naniscience and Nanotechnology, vol. 20, no. 7, pp. 4292-4297, doi: 10.1166/jnn.2020.17788, 2020-07
336S. Hong, Y. Hong, Y. Jeong, G. Jung, W. Shin, J. Park, J.-K. Lee, D. Jang, J.-H. Bae, and J.-H. Lee"Improved CO gas detection of Si MOSFET gas sensor with catalytic Pt decoration and pre-bias effect"Sensors and Actuators B: Chemical, vol. 300, p. 127040, doi: 10.1016/j.snb.2019.127040, 2019-12
335S. Y. Woo, K.-B. Choi, J. Kim, W.-M. Kang, C.-H. Kim, Y.-T. Seo, J.-H. Bae, B.-G. Park, and J.-H. Lee"Implementation of homeostasis functionality in neuron circuit using double-gate device for spiking neural network"Solid-State Electronics, vol. 165, p. 107741, doi: 10.1016/j.sse.2019.107741, 2020-03
334J. T. Jang§, H. Kang§, H. R. Yu, E. S. Kim, K. S. Son, S.-H. Cho, D. M. Kim, S.-J. Choi, D. H. Kim*"The Influence of Anion Composition on Subgap Density of States and Electrical Characteristics in ZnON Thin-Film Transistors"IEEE Electron Device Letters, vol. 40, no. 1, pp. 40-43, DOI: 10.1109/LED.2018.2883732, 2019-01
333J. Kim, C.-H. Kim, S. Y. Woo, W.-M. Kang, Y.-T. Seo, S. Lee, S. Oh, J.-H. Bae, B.-G. Park, and J.-H. Lee"Initial synaptic weight distribution for fast learning speed and high recognition rate in STDP-based spiking neural network"Solid-State Electronics, vol. 165, p. 107742, doi: 10.1016/j.sse.2019.107742, 2020-03
332S. Lim, J.-H. Bae, J.-H. Eum, S. Lee, C.-H. Kim, D. Kwon, B.-G. Park, and J.-H. Lee"Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices"Neural Computing & Applications, vol. 31, no. 11, pp. 8101-8116, doi: 10.1007/s00521-018-3659-y, 2019-11
331H. Kim, J.-H. Bae, S. Lim, S.-T. Lee, Y.-T. Seo, D. Kwon, B.-G. Park, and J.-H. Lee"Efficient precise weight tuning protocol considering variation of the synaptic devices and target accuracy"Neurocomputing, vol. 378, pp. 189-196, doi: 10.1016/j.neucom.2019.09.099, 2020-02
330B. Choi, J. Lee, J. Yoon, M. Jeon, Y. Lee, J. Han, J. Lee, J. Park, Y. Kim, D. M. Kim, D. H. Kim, S. Chung, C. Lim, S.-J. Choi*"Effect of charge trap layer thickness on the charge spreading behavior within a few seconds in 3-D charge trap flash memory"Semiconductor Science and Technology, vol. 33, no. 10, doi.org/10.1088/1361-6641/aade29, 2018-09
329Y. Hong, M. Wu, J.-H. Bae, S. Hong, Y. Jeong, D. Jang, J. S. Kim, C. S. Hwang, B.-G. Park, and J.-H. Lee"A new sensing mechanism of Si FET-based gas sensor using pre-bias"Sensors and Actuators B: Chemical, vol. 302, p. 127147, doi: 10.1016/j.snb.2019.127147, 2020-01
328S.-T. Lee, S. Lim, N. Choi, J.-H. Bae, D. Kwon, B.-G. Park, and J.-H. Lee"Operation Scheme of Multi-Layer Neural Networks Using NAND Flash Memory as High-Density Synaptic Devices"IEEE Journal of the Electron Device Society, vol. 7, pp. 1085-1093, doi: 10.1109/JEDS.2019.2947316, 2019-10
327H. R. Yu, J. T. Jang, D. Ko, S. Choi, G. Ahn, S.-J. Choi, D. M. Kim, and D. H. Kim*"Degradation on the Current Saturation of Output Characteristics in Amorphous InGaZnO Thin-Film Transistors"IEEE Transactions on Electron Devices, vol. 65, no. 8, DOI: 1109/TED.2018.2844862, 2018-08
326J.-H. Bae, S. Lim, D. Kwon, S.-T. Lee, H. Kim, and J.-H. Lee"Gated Schottky Diode-Type Synaptic Device with a Field-Plate Structure to Reduce the Forward Current"Journal of Nanoscience and Nanotechnology, vol.19, no. 10, pp. 6135-6138, doi: 10.1166/jnn.2019.17003, 2019-10
325S. Kim†, B. Choi†, M. Lim, Y. Kim, H.-D. Kim, S.-J. Choi* (†These authors equally contributed to this work)"Synaptic Device Network Architecture with Feature Extraction for Unsupervised Image Classification"Small, DOI: 10.1002/small. 201800521, 2018-07